- Siemens (Wilsonville, OR)
- …languages (Verilog, System-Verilog, VHDL) will be required. + Solid experience in RTL -to- RTL manipulation and introspection software (Parsing, Design ... Job Family: Software Req ID: 450920 Siemens EDA is a...is looking for a highly motivated, creative, and energetic engineer with expertise in digital circuit design and verification… more