- Meta (Austin, TX)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Methodology Responsibilities: 1. Work with our ... **Summary:** Meta is hiring ASIC Methodology Engineers within our Infrastructure organization to work on design integrity and signoff methodology … more
- Meta (Austin, TX)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , EDA Infrastructure Responsibilities: 1. Front End implementation flow ... **Summary:** Meta is hiring ASIC EDA Infrastructure Engineers within our Infrastructure ...looking for individuals with experience in EDA flow and methodology , CAD/automation and ASIC infrastructure to build… more
- Qualcomm (Austin, TX)
- …a closely related field is preferred + 5+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... Master's degree in Computer Science, Electrical Engineer , Computer Engineering, or a closely related field +...closely related field + 5+ years of experience with ASIC design and verification tools, techniques, and methodology… more
- SpaceX (Bastrop, TX)
- Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER ...Functional ECOs for complex blocks + Deploy and enhance methodology and flows related to timing constraint generation and… more
- Qualcomm (Austin, TX)
- …Science, or a closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... Master's degree in Computer Science, Electrical Engineer , Computer Engineering, or a closely related field +...closely related field + 3+ years of experience with ASIC design and verification tools, techniques, and methodology… more
- Meta (Austin, TX)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...experience. 9. 10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification. 10. 10+ years experience… more
- Meta (Austin, TX)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...cycles 9. 14+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 10. 14+ years experience… more
- Meta (Austin, TX)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...joining Meta. 7. 3+ years hands-on experience in SystemVerilog/UVM methodology or C/C++ based verification 8. Track record of… more
- Meta (Austin, TX)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...experience. 8. 5+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification. 9. Track record of… more
- Meta (Austin, TX)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the...Verification 2. Propose, implement and evangelize the Formal Verification Methodology to be used across the group, both at… more