- Amazon (Sunnyvale, CA)
- …personal robot. What will you help us create? As an ASIC Methodology / CAD engineer you will create and maintain automated design flows that improve ... the efficiency and design quality of the finished ASIC products. Key job responsibilities - Develop automated flows for improving the SoC design process - Build… more
- Qualcomm (San Diego, CA)
- …Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a Timing Engineer , you will play a vital role in Timing analysis targeting the ... physical design team (and other teams) on timing closure, CAD teams, IP teams and Design Technology Teams for...and Tempus. + You will facilitate and drive STA methodology for Qualcomm using PT-SI, Tempus and best in… more
- Meta (Austin, TX)
- … organization. We are looking for individuals with experience in EDA flow and methodology , CAD /automation and ASIC infrastructure to build efficient System ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , EDA Infrastructure Responsibilities: 1. Front End implementation flow… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Signal Integrity, and Power Integrity focus for its ASIC packaging team to support ... as part of a world-class engineering team. **Required Skills:** ASIC Package Engineer SI/PI Responsibilities: 1. Drive...interface and PDN, create simulation models and develop simulation methodology for SIPI design 4. Lead SIPI validation … more
- Capgemini (San Francisco, CA)
- **Job description:** Experienced ASIC Packaging Engineer , Signal Integrity, and Power Integrity focus for its ASIC packaging team to support the development ... by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Physical Design Engineer - ASIC Package Engineer SI/PI Engineer_ **Location:**… more
- Capgemini (San Francisco, CA)
- **Job description:** Capgemini Engineering is looking for an experience ASIC Package Engineer to join our semiconductor domain. The engineer will be working ... interface and PDN, create simulation models and develop simulation methodology for SIPI. + We will develop SIPI validation...and improve design flow. + Work closely with Architecture, ASIC , Mixed Signal, Package, and PCB Design teams to… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. Be part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the Front-End Design Implementation methodology for ... and support sophisticated flows around EDA tools and our CAD programs. What you'll be doing: + You will...design implementation and analysis tools + Provide support for ASIC tools and flows + Assist chip design teams… more
- Sandia National Laboratories (Albuquerque, NM)
- …job classification. What Your Job Will Be Like: We are seeking an R&D Electrical/EDA/ CAD Engineer to fill a very unique role within Sandia's state-of-the-art ... (bug reporting, issue resolution). + Drive physical design auto-place route (APR) methodology . + Implement final verification (layout vs schematic (LVS), design rule… more
- NVIDIA (Santa Clara, CA)
- …you can make a lasting impact on the world! We are currently looking for a Software/ CAD engineer to join our team! In this role you'll be building solutions to ... equivalent experience + 3+ years of experience in VLSI CAD flows and methodology + Good programming...out from the crowd: + Previous work in VLSI, ASIC , or EDA is a definite plus + Experience… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... flow, and tool for high-speed designs, with focus on CAD and automation. + Develop custom flows for validating...Electrical or Computer Engineering with 3 years' experience in ASIC Design and Timing. + Good understanding of modeling… more