- Meta (Sunnyvale, CA)
- …the impact they can create as part of a world-class engineering team. **Required Skills:** ASIC Package Engineer SI /PI Responsibilities: 1. Drive chip- ... **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Signal... technology 2. Drive package level Lead ASIC package SI /PI design activities,… more
- Capgemini (San Francisco, CA)
- …_Developer_ **Organization:** _ERD PPL US_ **Title:** _Physical Design Engineer - ASIC Package Engineer SI /PI Engineer_ **Location:** _CA-San ... **Job description:** Experienced ASIC Packaging Engineer , Signal..., and PCB Design teams to design and ensure package /system SI /PI performance meets expectation before Gerber… more
- Cisco (San Jose, CA)
- …engineering or related field * Experience with MATLAB or Python scripting * Experience with SI /PI of 2.5D advanced ASIC packaging * Experience with Raptor-X ... Power Integrity to help us develop our next generation ASIC packaging . You will work on cutting-edge...speed, and fabrication / assembly technology. You will drive ASIC package power and signal integrity rules… more
- Qualcomm (San Diego, CA)
- …for PVT corners validation and STA vs spice correlation. Timing package validation across advanced process technologies using PT/PT- SI and ... Group > ASICS Engineering **General Summary:** As a Timing Engineer , you will play a vital role in Timing...will facilitate and drive STA methodology for Qualcomm using PT- SI , Tempus and best in class timing ECO tools… more
- Meta (Sunnyvale, CA)
- …a world-class engineering team. **Required Skills:** Silicon Packaging Design Engineer Responsibilities: 1. Perform package design for advanced custom ... **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem...platform tools. 10. Basic understanding in one of the SI /PI tools (XtractIM, PowerSI, HFSS, Q3D, etc.), package… more
- The Boeing Company (El Segundo, CA)
- …engineering, foundry, test, and QA + Create and execute substrate breakout patterns for ASIC packaging + Optimize package pinouts by evaluating system-level ... Defense Space & Security has an exciting opportunity as a **Lead Advanced Microelectronics Packaging Design Engineer ** . Come join us as part of our Electronics… more
- Cisco (San Jose, CA)
- …and work closely with system architects, logic designers, ASIC engineers, package engineers, and other versatile and knowledgeable SI /PI engineers in the ... work. Meet the Team Cisco enterprise and cloud networking SI team is seeking a Senior Signal & Power...and post-route signal integrity analysis of both PCB and ASIC package designs * Generating and verifying… more
- Qualcomm (Santa Clara, CA)
- …degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree ... in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science,… more
- Qualcomm (San Diego, CA)
- …root-cause analysis of failures at the board, RTL, FW, and SW levels in both Pre- Si (FPGA prototyping) and Post- Si ( ASIC ) phases 2. Develop, implement, and ... an experienced candidate for the position of SoC Debug Engineer . **Key Responsibilities** In this role, the candidate will...Qualifications:** + 5 to 8 years of experience in Pre- Si and Post-Silicon hardware bring-up, validation, and debug +… more
- Cisco (San Jose, CA)
- …team working closely with system architects, logic designers, ASIC engineers, package engineers, and versatile and knowledgeable SI /PI engineers in the ... work. Meet the Team The Cisco Enterprise Access Switching SI team is seeking a Signal Integrity Engineer...and post-route signal integrity analysis of both PCB and ASIC package designs. * Write signal integrity… more