- Cisco (San Jose, CA)
- … power , speed, and fabrication / assembly technology. You will drive ASIC package power and signal integrity rules and layout analysis to enable ... ASIC team is looking for an expert in Signal and Power Integrity to help us... Integrity to help us develop our next generation ASIC packaging . You will work on cutting-edge… more
- Qualcomm (San Diego, CA)
- …designers at various levels to help with designing high-speed, high-performance and low- power mixed- signal IPs (SerDes, DDR, PLL, DAC, ADC, sensors, etc.) ... targeted for 5G, AI/ML, compute, and automotive applications. QCT mixed- signal design team consists of architects and ASIC...our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work,… more
- Broadcom (Fort Collins, CO)
- …, area, and speed. + Understanding of complex issues related to timing closure, power integrity and signal integrity. + Ability to debug complex design issues ... Candidate Account, please Sign-In before you apply.** **Job Description:** ** ASIC Design - Senior Manager** Be part of the...align and drive schedules with IP teams, DFT teams, packaging teams, quality teams, etc. + Ensure on-time execution… more
- Qualcomm (San Diego, CA)
- …Summary:** Qualcomm mixed- signal IP design team is seeking talented senior ASIC digital designers to join our efforts in developing the next generation of ... - Apply computer architecture and optimization techniques for improving power , performance, and area of the IPs - Assist...- Assist in running the full suite of front-end ASIC design tools (lint checking, CDC, DFT, synthesis, FV,… more
- Cisco (San Jose, CA)
- …custom library development (Standard Cell and I/O), physical design & DFT, Signal Integrity, and complexed packaging technology. Our silicon is developed ... a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within...Relevant courses include Computer Architecture, Logic Design, VLSI, Programming, Signal and Power Integrity, and DFx. *… more
- SpaceX (Irvine, CA)
- Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where ... with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- San Jose State University (San Jose, CA)
- … signal processing, network and network security, mobile network, power electronics, energy systems, microprocessors and computer systems, embedded systems, ... Assistant Professor - Electrical Engineering: ASIC , SOC, AI/ML Hardware & Embedded Systems Design Apply now… more
- SpaceX (Irvine, CA)
- SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity ... possible, with the ultimate goal of enabling human life on Mars. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- Broadcom (San Jose, CA)
- …, area, and speed. + Understanding of complex issues related to timing closure, power integrity and signal integrity. + Physical verification to ensure error ... industry, including AI. Be part of the Design Implementation team within Broadcom ASIC Products Division where we create CMOS ASIC 's for industry leading… more
- Broadcom (San Jose, CA)
- …, area, and speed. - Understanding of complex issues related to timing closure, power integrity and signal integrity. - Physical verification to ensure error ... apply.** **Job Description:** Be part of the Design Implementation team within Broadcom ASIC Products Division where we create CMOS ASIC 's for industry leading… more