• Senior ASIC Physical Design

    NVIDIA (Santa Clara, CA)
    …life's work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and ... inventiveness and intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in class PPA for high-performance designs, eg… more
    NVIDIA (01/08/25)
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  • Senior ASIC Physical Design

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer , Netlisting to join our dynamic ... inventiveness and intelligence. What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster… more
    NVIDIA (02/22/25)
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  • ASIC Engineer , Physical

    Meta (Sunnyvale, CA)
    …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience in backend… more
    Meta (01/21/25)
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  • ASIC Physical Design

    Amazon (Cupertino, CA)
    …you - come build the future with us! Key job responsibilities * Perform physical design for Amazon's machine learning custom silicon solutions * Participate in ... various aspects of physical design : full chip floorplanning, circuit analysis, power/clock distribution, timing optimization, place and route, power integrity… more
    Amazon (04/04/25)
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  • Physical Design Engineer

    Capgemini (San Francisco, CA)
    …in the US by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Physical Design Engineer - ASIC Package Engineer SI/PI Engineer_ ... **Job description:** Experienced ASIC Packaging Engineer , Signal Integrity, and...Input/Output Physical Layer (IO PHY), SI/PI and physical design . **Required Skills:** *Bachelor or Master… more
    Capgemini (03/13/25)
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  • Physical Design Engineer

    Amazon (Austin, TX)
    …we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze ... Basic Qualifications - BS + 4yrs or MS + 3yrs in EE/CS - 4+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm - Block … more
    Amazon (03/19/25)
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  • Sr. Physical Design Engineer

    Amazon (Austin, TX)
    …we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze ... Basic Qualifications - BS + 8yrs or MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm - Block … more
    Amazon (03/04/25)
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  • Sr. Physical Design Methodology…

    Amazon (Cupertino, CA)
    …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies ... in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies including synthesis, place and route,… more
    Amazon (03/29/25)
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  • ASIC and/or FPGA Design

    The Boeing Company (Kent, WA)
    …and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + Integrate ... & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers...Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products… more
    The Boeing Company (03/22/25)
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  • Senior ASIC Design Engineer

    Palo Alto Networks (Santa Clara, CA)
    …meet aggressive goals for area, timing, power, and testability in close collaboration with ASIC physical design engineers + Perform synthesis + Optimize ... we all win with precision. **Your Career** As a Design engineer on the ASIC ...+ Debugging simulation, emulation, and silicon validation + Analyzing physical design reports and fixing timing and… more
    Palo Alto Networks (03/19/25)
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