• CPU Physical Design

    Qualcomm (Santa Clara, CA)
    …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Physical Design Clock Engineer, you will work with microarchitecture, ... practical experience. + Skilled in chip physical design , standard cell optimizations, and clock construction.... design teams to understand, implement and validate CPU clocking. + Drive overall clock generation… more
    Qualcomm (02/20/25)
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  • Senior CPU Design Engineer

    NVIDIA (Hillsboro, OR)
    We are looking for a Senior CPU Design Engineer! NVIDIA is seeking best-in-class CPU Design Engineers to design the world's leading CPUs. This ... will work closely with fellow design engineers, architects, verification engineers, and physical design engineers to accomplish your tasks. What you will be… more
    NVIDIA (03/27/25)
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  • CPU Systems RTL Engineer

    Qualcomm (Austin, TX)
    … delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability ... Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** We are hiring talented engineers for … more
    Qualcomm (04/04/25)
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  • Senior Physical Design Methodology…

    NVIDIA (Santa Clara, CA)
    …and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with emphasis on ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...and route methods, floorplanning and chip assembly, power and clock distribution, power and area optimization, timing, IR and… more
    NVIDIA (02/20/25)
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  • Sr. ASIC Design Engineer (Silicon…

    SpaceX (Irvine, CA)
    …and power optimization + ASIC/SoC system integration experience + Experience with multicore CPU subsystem design + Experience with standard bus protocols (eg ... Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX...age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants… more
    SpaceX (04/15/25)
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  • P&R CAD Senior Staff Engineer

    Qualcomm (San Diego, CA)
    design cycle time, in close collaboration with Snapdragon Implementation and Physical Design teams. Qualcomm is using leading edge internal and EDA ... or enabling new advanced process nodes. + Support Snapdragon design teams on CAD Place and Route solutions, analyze...as cell legalization issues, congestion hotspots, always-on feedthrough management, clock H-tree and CTS etc. + Drive the Place… more
    Qualcomm (02/21/25)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …basis to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues * ... Clock Domain, Reset Domain Crossing issues, and Low-Power Design Techniques * Prior experience with simulators and waveform...protocols (AXI, CHI, APB. AHB) and exposure to ARM CPU 's is desirable. * Design experience with… more
    Cisco (01/31/25)
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  • Applications Engineer Consultant EDA Functional…

    Siemens (Fremont, CA)
    …to build a career in a rapidly growing and constantly innovating Electronic Design Automation (EDA) industry? Do you enjoy working with cutting edge technology and ... for candidates who like to interact with and influence others, possess strong design and/or verification background, requiring both in depth knowledge of HDL and… more
    Siemens (03/18/25)
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