- Qualcomm (Folsom, CA)
- …drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer, you will work with microarchitecture and RTL ... design team to develop timing constraints, drive...with STA native tools and also useful in enabling CPU timing infrastructure and methodology impacting multiple… more
- Qualcomm (San Diego, CA)
- …and implement multi-core CPU operations for all Qualcomm Business Units. As a CPU Physical Design Engineer, you will work with microarchitecture and RTL ... power implementation methods + Knowledge of CPU microarchitecture, logic design and circuits ** Physical Requirements** + Frequently transports between… more
- Qualcomm (Santa Clara, CA)
- …highly talented, innovative, teamwork-oriented individuals for our cutting-edge technology work! As a CPU Physical Design Engineer, you will work with ... Knowledge of high performance and low power implementation methods + Knowledge of CPU microarchitecture, logic design and circuits Preferred qualifications + MS… more
- NVIDIA (Hillsboro, OR)
- …meet performance, timing and power targets. + Deliver a synthesis/ timing clean design while working with the physical design team ensuring a routable ... We are looking for a Senior CPU Design Engineer! NVIDIA is seeking...fellow design engineers, architects, verification engineers, and physical design engineers to accomplish your tasks.… more
- Qualcomm (Austin, TX)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Physical Design Methodology Engineer, you will work with ... + Experience with Synthesis, place and route and signoff timing /power analysis. + Knowledge of high performance and low... design , Circuits, CAD) to solve key physical design problems in CPU … more
- Qualcomm (San Diego, CA)
- … (micro-architecture, modeling, RTL), Implementation (synthesis & timing constraints), Design -for-Test (DFT), Physical Design (Place & route, CTS, ... coverage collection, gate level simulation, waveform viewers + C, C++, Python **_Digital Design /DV_** + RTL development for modem physical and MAC layer… more
- Qualcomm (Austin, TX)
- …Work with multi-functional engineering team to implement and validate physical design on the aspects of timing , area, reliability, testability and power. ... Experience with simulators and waveform debugging tools. * Knowledge of logic design principles along with timing and power implications. **Preferred… more
- Qualcomm (Austin, TX)
- …synthesis, place & route and tapeout flows. Roles and Responsibilities + Perform CPU physical design tasks, including floorplanning, Bump/RDL planning, IP ... and physical design teams to design , floorplan and integrate the CPU designs...+ Proficiency in synthesis, place and route, and signoff timing /power analysis. + Expertise in block-level implementation as well… more
- Qualcomm (Austin, TX)
- …Work with multi-functional engineering team to implement and validate physical design on the aspects of timing , area, reliability, testability and po ... targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer, you...+ RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing… more
- NVIDIA (Santa Clara, CA)
- …need to see: + BS or MS (or equivalent experience) + 6+ years of CPU design implementation experience + Deep understanding of logic optimization techniques and ... expertise to improve PPA (power, performance and area) on CPU designs by collaborating with logic designers, physical...from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical … more