- Cadence Design Systems, Inc. (Austin, TX)
- …on the world of technology. In this role, we are targeting someone who is familiar with physical design flow (place and route), RTL to GDS or Netlist to GDS. ... more
- Medtronic (Tempe, AZ)
- …Digital Design Engineer** , with academic or professional background in low power IC design solutions. The ideal candidate is able to leverage his/her skills ... more
- Medtronic (Tempe, AZ)
- …Integrated Circuit (ASIC) based on product DFT requirements * Work as IC Design DFT Lead to structure DFT flow for optimized execution across all supported ... more
- Broadcom (San Jose, CA)
- …checking, STA, RTL/gate level simulations & silicon debug + Scripting for various IC design tasks such as STA, equivalency checks, test bench, simulations, ... more
- Broadcom (Irvine, CA)
- …+ Familiar with scripting languages such as tcl, perl and python. Write scripts to automate physical design flow and make it more efficient. + Expertise on ... more
- Broadcom (Fort Collins, CO)
- …System-On-Chip ASICs. Key competencies required are: + Working experience in (digital) physical design implementation of large scale ASICs (Multi-100 million ... more
- Power Integrations (San Jose, CA)
- …market transformation. Duties and Responsibilities + Develops and maintains PDKs. + Supports all IC design CAD tools such as Cadence schematic entry, mixed mode ... more
- Google (Mountain View, CA)
- …+ Knowledge of on-chip power analysis flow (eg PTPX, Redhawk, Voltus) and SoC physical design (eg floor plan) with high speed oscilloscopes, TDR and VNA. Be ... more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and success rate in next engagements Job Requirements Minimum + 15+ years of industry Physical Design experience with 4+ years of managing a team + BS degree ... more
- Cisco (San Jose, CA)
- …workflows. * Experience working with one or more of the following physical design tools, such as Cadence, Innovus, Synopsys IC Compiler, or Fusion Compiler. ... more