- Qualcomm (Austin, TX)
- …SoC Implementation Team is looking for skilled engineers to focus on timing constraints development, power analysis, STA , and timing closure for ... This is an excellent opportunity to join the Snapdragon implementation team, which is responsible for SoCs in sub-3nm...and low-power multi-voltage domain crossings, and signoff with static timing analysis. + Collaborate closely with RTL design… more
- Siemens (Austin, TX)
- …candidate should have very good knowledge of Tcl/Python programming, digital circuit design , and design implementation flows with particular emphasis ... Job Family: Software Req ID: 457349 Title: Timing Analyst ( STA ) Expert About the...+ Knowledge and understanding of all aspects of a design flow - particularly SDC, static timing … more
- Ford Motor Company (Dearborn, MI)
- …you ready to change the way the world moves? Product Development uses design thinking & user experience methods to deliver breakthrough products and services that ... senior leaders in the Ford product development, research, purchasing, and site STA teams. This will require excellent verbal and written communication skills and… more
- SpaceX (Irvine, CA)
- …to meet critical deadlines, as needed COMPENSATION & BENEFITS: Pay range: Physical Design STA / Timing Engineer/Level I: $120,000.00 - $145,000.00/per year ... SOC/ASIC Timing Signoff & Front-End Implementation Engineer...Physical Design STA / Timing Engineer/Level II: $140,000.00 - $170,000.00/per year… more
- SpaceX (Irvine, CA)
- …in advanced nodes + Experience with test modes, mode merging to optimize physical design implementation and STA Signoff. + Experience with power intent ... Sr. SOC/ASIC Timing Signoff & Front-End Implementation Engineer...will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation ). In… more
- Qualcomm (Folsom, CA)
- …you will work with microarchitecture and RTL design team to develop timing constraints, drive implementation of the designs to meet aggressive power, area ... Design Timing Engineer,... automation using TCL/Perl/Python. + Familiar with digital flow design implementation RTL to GDS : ICC, Innovous… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Timing Responsibilities: 1. Develop Timing Constraints ... scripts and Methodology for all FE-tools including ( Synthesis, STA ). 7. Work closely with the Design ...them with the handoff tasks. 8. Interact with Physical Design Engineers and provide them with timing /congestion… more
- Google (San Diego, CA)
- …silicon timing closure and chip integration. + Experience with STA signoff constraint authoring for full-chip level, tapeout signoff requirements, checklists, ... in state-of-the-art technology process nodes. + Experience with ASIC design flows and methodology of static timing ...full chip timing constraint creation and validation, timing signoff checklist criteria, perform full chip STA… more
- NVIDIA (Westford, MA)
- …human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon ... you will be doing: + You will drive physical design and timing of high-frequency and low-power...including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation .… more
- NVIDIA (Santa Clara, CA)
- …or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation , and ... timing including setting up timing constraints, timing analysis and closure, ECO implementation , and...to collaborate with cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to… more