- SpaceX (Irvine, CA)
- Sr . DDR IP Design Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out exploring ... the ultimate goal of enabling human life on Mars. SR . DDR IP DESIGN...world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design… more
- Micron Technology, Inc. (Richardson, TX)
- …RTL style logic design are blended into the same product, and most of the DDR or LPDDR design is based on the gate-level design only. Lastly, ... design and development of HBM base die SoC solutions, including top-level design , verification, and integration of various IP blocks. + Ensure HBM products… more
- Micron Technology, Inc. (Richardson, TX)
- …You will apply your deep understanding of SOC Architecture, RTL Logic Design , IP Integration, high-speed interface design , high-performance computing ... blended into the same product, and most of the DDR or LPDDR design is based on...exciting. **What's Encouraged Daily:** + Develop test plans at IP /Subsystem/SOC Level. + Review architectural specifications to ensure high… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable ... testbenches Knowledge of protocols like JTAG, UART, PCIe, AMBA, DDR Knowledge of design fundamentals such as...JTAG, UART, PCIe, AMBA, DDR Knowledge of design fundamentals such as architecture, micro-architecture, HDLs and Synthesis… more
- Cadence Design Systems, Inc. (Austin, TX)
- …a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable ... the following responsibilities: + Architect solutions for the latest DDR controller features and customer requirements + Design...PHY design team, etc. + Utilize Cadence's Design Automation flow and IP development tools.… more
- Capgemini (Seattle, WA)
- **Job Role:** **SOC Design Verification Engineer** **Job location: Seattle WA** **Job Description:** We are looking for SOC Design Verification Engineer who can ... functional tests based on verification test plan. **Key Responsibilities:** + Drive Design Verification to closure based on defined verification metrics on test… more
- Amazon (Cupertino, CA)
- …closure, IR drop analysis, physical verification, ECO and sign-off - Develop physical design methodologies - Evaluate 3rd party IP and provide recommendations - ... of device physics, custom/semi-custom implementation techniques - Experience solving physical design challenges across various technologies such as DDR , PCIe,… more
- CACI International (Los Gatos, CA)
- Senior FPGA Engineer/Architect Job Category: Engineering Time Type: Full time Minimum Clearance Required to Start: None Employee Type: Regular Percentage of Travel ... * * * At CACI, we specialize in the design , development, and manufacturing of complex, state-of-the-art sensors and...the team + Selection and integration of complex licensed IP cores in Xilinx Versal class FPGAs and SOCs,… more