- SpaceX (Redmond, WA)
- Sr . SOC / ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC / ASIC PHYSICAL ...and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $160,000.00 - $220,000.00/per year… more
- SpaceX (Irvine, CA)
- Sr . SOC / ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... the ultimate goal of enabling human life on Mars. SR . SOC / ASIC TIMING SIGNOFF &...ownership throughout the entire project cycle (RTL, synthesis, and physical implementation) + Analysis of clock domain crossing paths… more
- Amazon (Redmond, WA)
- …looking for a Sr . Technical Program Manager with experience in ASIC / SOC development, from architecture to pre-production stages, project management, and ... Key job responsibilities In this role you will: - Collaborate with engineering leaders ( ASIC / SOC leads) to create project execution plans for ASIC / SOC… more
- SpaceX (Irvine, CA)
- Sr . ASIC Design Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars ... the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN ENGINEER (SILICON ENGINEERING) At...problems including clock domain crossings and power optimization + ASIC / SoC system integration experience + Experience with… more
- Western Digital (Milpitas, CA)
- … team to drive continuous improvement. + Oversee the end-to-end development of ASIC products including IP development, SOC design, and productization meeting the ... product company. + Minimum of 20 years' experience in ASIC development with a focus on IP, SOC...Sr management role + Demonstrated delivery of large-scale ASIC projects and productization + Deep technical expertise and… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's ... leading SoC 's and GPU's. This position offers you a unique...opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing… more
- Capgemini (San Francisco, CA)
- ** Physical Design Engineer** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... top level and/or blocks, with experience across the complete ASIC / SOC design flow including routing, static timing...PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San Francisco_… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of ... SOC clocking. The team collaborates with the front end...floor-planning and back end teams to help craft the physical floorplan of the chip and explains the programming… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically...and Digital Systems design. + A deep understanding of ASIC design flow including RTL design, verification, logic synthesis,… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU ... floor-planning and back end team to help craft the physical floorplan of the chip. The team explains the...team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency… more